Institute of Innovative Research, 
Tokyo Institute of Technology.



2022 Suematsu Award “Fundamentals and Developments of Digital Technology” Winners Announced

  • Conferrer: Tokyo Institute of Technology
  • Prize: 2022 Suematsu Award "Fundamentals and Developments of Digital Technology"
  • Award date: September 29, 2022
  • Prize Winners: Asst. Prof. Yohei Aikawa(Photonics Integration System Research Center)
  • Prize: 2022 Suematsu Award "Fundamentals and Developments of Digital Technology"
  • Research Topic: A study on low-latency logical circuit based on optical likelihood calculation
  • Award Details:
    Today's digital society has been supported by electrical circuits made of complementary metal oxide semiconductor (CMOS). However, as circuits become smaller, processing delays increase, which is a major problem. To solve this problem, there is an effort to introduce optical signal processing in electrical circuits. This approach is expected to improve processing delay as the size of the circuits become smaller, since the processing is completed as light signal propagates through the circuit. Based on the background, the author has been engaged in research on optical likelihood calculations and has succeeded in realizing its operation. This research applies the calculation technology to logic circuit. In particular, the author approaches the input-output relationship of the circuit as likelihood calculation. This will enable optics and electrons to share processing in a suitable manner and is expected to open the way to lower latency digital technology.
  • Prize Winners: Asst. Prof. Takamasa Kawanago(Quantum Nanoelectronics Research Center)
  • Prize: 2022 Suematsu Award "Fundamentals and Developments of Digital Technology"
  • Research Topic: Ultralow-Voltage Design and Device Technology of WSe2 CMOSFET for Energy Efficient Digital Electronics
  • Award Details:
    Digital electronics based on silicon (Si) semiconductors is the fundamentals of modern society, and further development is necessary in the future. However, miniaturization of semiconductor device, which is the guiding principle of performance improvement, has reached its essential limit. Once miniaturization is completed, performance will improve by only 3% per year. Furthermore, a significant increase in the energy consumption of semiconductor devices due to a rapid increase in the amount of information communication is an urgent issue on a global scale. Therefore, tungsten diselenide (WSe2), which has no dangling bonds and exhibits high mobility of electrons and holes exceeding that of Si even with a single molecular layer and ambipolar conduction, has attracted much attention as a semiconductor to replace Si. The purpose of this study is to establish the device technology of WSe2 CMOSFET and to realize digital electronics with high energy efficiency by ultra-low voltage operation. By independently establishing source/drain technology with alloy and compound metals and self-aligned gate stack technology, a CMOS inverter gain of 15 at low voltage 0.5V operation will be demonstrated.